FIG. 6 illustrates a conventional gain control amplifier using a Gilbert cell. A differential amplifying circuit 21 includes a first transistor 21a and a second transistor 21b. The emitter of the first transistor 21a and the emitter of the second transistor 21b are connected to each other and a constant current source 22. A first gain control circuit 23 is connected to the collector of the first transistor 21a, and a second gain control circuit 24 is connected to the collector of the second transistor 21b. 
The first gain control circuit 23 includes a third transistor 23a and a fourth transistor 23b. The emitters of the third transistor 23a and the fourth transistor 23b are connected to the collector of the first transistor 21a. The collector of one transistor (the third transistor) 23a is connected to a power source through a feeding resistor 23c. The collector of the other transistor (the fourth transistor) 23b is directly connected to the power source.
The second gain control circuit 24 includes a fifth transistor 24a and a sixth transistor 24b. The emitters of the fifth transistor 24a and the sixth transistor 24b are connected to the collector of the second transistor 21b. The collector of one transistor (the fifth transistor) 24a is connected to the power source through a feeding resistor 24c. The collector of the other transistor (the sixth transistor) 24b is directly connected to the power source.
Thus, the differential amplifying circuit 21 and the gain controlling circuits 23 and 24 are connected to the power source in series.
The base of the third transistor 23a of the first gain control circuit 23 and the base of the fifth transistor 24a of the second gain control circuit 24 are connected to each other. Meanwhile, the base of the fourth transistor 23b of the first gain control circuit 23 and the base of the sixth transistor 24b of the second gain control circuit 24 are connected to each other. A gain control voltage (AGC) is applied between a contact point located between the base of the third transistor 23a and the base of the fifth transistor 24a and a contact point between the base of the fourth transistor 23b and the base of the sixth transistor 24b. A signal is balanced-input to a place (IN) between the base of the first transistor 21a and the base of the second transistor 21b. A place (OUT) between the collector of the third transistor 23a and the collector of the fifth transistor 24a is a balanced output terminal (for example, refer to Japanese Unexamined Patent Application Publication No. 2001-7667 (FIGS. 3 and 4)).
In the above structure, when the gain control voltage is changed, the increasing and decreasing direction of the current that flows to each one of transistors (the third transistor 23a and the fifth transistor 24a) of the gain control circuits 23 and 24, is reverse to the increasing and decreasing direction of the current that flows to the other transistors (the fourth transistor 23b and the sixth transistor 24b) of the gain control circuits 23 and 24, such that the level of a signal that is balanced-output to a place between the collector of the third transistor 23a and the collector of the fifth transistor 24a changes.
The above-mentioned gain control amplifier is widely used as a balanced gain control amplifier. However, the differential amplifying circuit and the gain control circuit are connected to the power source in series. Therefore, the voltage supplied to the respective circuits is reduced. Also when the source voltage is low, it is difficult to fully achieve the desired performance of the overall circuit.